2021

• Klute, L.R.W. (2021) Space-time Trade-off in Clash: Improving Smart Machines. MSc thesis, University of Twente, The Netherlands, July 2021.

• Strijker, H.W. (2021) Ethernet implementation in Clash. MSc thesis, University of Twente, The Netherlands, January 2021.

2020

• Westerveld, J.P. van (2020) FPGA partial reconfiguration and automatic variant generation as a side-channel attack countermeasure with functional HDL Clash. MSc thesis, University of Twente, The Netherlands, December 2020.

• Bremmer, D.J. (2020) Mapping dataflow over multiple FPGAs in Clash. MSc thesis, University of Twente, The Netherlands, November 2020.

2019

• Lebbing, P. (2019) Modelling and Realizing the Tunnelling Ball Device in UniTi and CλaSH. MSc thesis, University of Twente, The Netherlands, June 2019.

• Van Raalte, E. (2019) Automating system generation in Clash. MSc thesis, University of Twente, The Netherlands, March 2019.

• Wijlens, B. (2019) Building a framework in Clash to create deterministic sensor and actuator interfaces for FPGAs. MSc thesis, University of Twente, The Netherlands, 2019.

2017

• Wentink, D.J.M. (2017) Signal Recovery using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, December 2017.

• Gottimukkala, Anirudh (2017) Implementation of a digital Class-D amplifier controller in CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, November 2017.

• Appel, R. and Folmer, H.H. and Kuper, J. and Wester, R. and Broenink, J.F. (2017). Design-Time Improvement Using a Functional Approach to Specify GraphSLAM with Deterministic Performance on an FPGA. In 2017 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS) (pp. 797-803). DOI: 10.1109/IROS.2017.8202241

• Kuipers, F.P. (2017) FPGA design support using CλaSH and LUNA. MSc thesis, University of Twente, Enschede, The Netherlands, May 2017.

2016

• Appel, R.N. and Folmer, H.H. (2016) Analysis, optimization, and design of a SLAM solution for an implementation on reconfigurable hardware (FPGA) using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, December 2016.

• Vossen, J.J. (2016) Offloading Haskell functions onto an FPGA. MSc thesis, University of Twente, Enschede, The Netherlands, December 2016.

• Verheij, J.G.J. (2016) Co-simulation between CλaSH and traditional HDLs. MSc thesis, University of Twente, Enschede, The Netherlands, August 2016.

2015

• Raa, I. te (2015) Recursive functional hardware descriptions using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, November 2015.

• Wester, R. (2015) A transformation-based approach to hardware design using higher-order functions. PhD thesis, University of Twente, Enschede, The Netherlands, July 2015.

• Bakker, M. (2015) Numerical mathematics on FPGAs using CλaSH. BSc thesis, University of Twente, Enschede, The Netherlands, July 2015.

• Dam, M.R. (2015) Auditory processing using CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, May 2015.

• Harmsen, R. (2015) Specifying the WaveCore in CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, March 2015.

• Baaij, C.P.R. (2015) Digital Circuits in CλaSH: Functional Specifications and Type-Directed Synthesis. PhD thesis, University of Twente, Enschede, The Netherlands, January 2015.

• Wester, R. and Kuper, J. (2014) Design space exploration of a particle filter using higher-order functions. In: Reconfigurable Computing: Architectures, Tools, and Applications. Lecture Notes in Computer Science 8405. Springer Verlag, London, pp. 219-226. ISSN 0302-9743 ISBN 978-3-319-05959-4.

2014

• Bos, J.C.H. (2014) Synthesizable Specification of a VLIW Processor in the Functional Hardware Description Language CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, September 2014.

• Niedermeier, A. (2014) A Fine-Grained Parallel Dataflow-Inspired Architecture for Streaming Applications. PhD thesis, University of Twente, Enschede, The Netherlands, August 2014.

• Kuper, J. and Wester, R. (2014) N Queens on an FPGA: Mathematics, Programming, or Both?. In: Communicating Processes Architectures 2014, 24-27 August 2014, Oxford, UK. Open Channel Publishing. ISBN 978-0-9565409-8-0.

• Bronkhorst, T.A.W. (2014) Hardware design of a cooperative adaptive cruise control system using a functional programming language. MSc thesis, University of Twente, Enschede, The Netherlands, August 2014.

• Jin, X. (2014) Implementation of the MUSIC Algorithm in CλaSH. MSc thesis, University of Twente, Enschede, The Netherlands, June 2014.

• Nee, F. van (2014) To a new hardware design methodology: A case study of the cochlea model. MSc thesis, University of Twente, Enschede, The Netherlands, March 2014.

• Baaij, C.P.R. and Kuper, J. (2014) Using Rewriting to Synthesize Functional Languages to Digital Circuits. In: Jay McCarthy, editor, Trends in Functional Programming (TFP), Provo, UT, USA, May 14-16, 2013. Volume 8322 of Lecture Notes in Computer Science (LNCS). pages 17–33. Springer-Verlag. ISBN 978-3-642-45340-3.

2012

• Wester, R. and Baaij, C.P.R. and Kuper, J. (2012) A two step hardware design method using CλaSH. In: Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), Aug 29-31, 2012, Oslo, Norway. pages 181-188. IEEE Computer Society. ISBN 978-1-4673-2257-7.

• Wester, R. and Sarakiotis, D. and Kooistra, E. and J. Kuper. (2012) Specifications of APERTIF Polyphase Filter Bank in CλaSH. In: Communicating Process Architectures (CPA), pages 53-64, United Kingdom, August 2012. Open Channel Publishing. ISBN 978-0-9565409-5-9.

2011

• Gerards, M.E.T. and Baaij, C.P.R. and Kuper, J. and Kooijman, M. (2011) Higher-Order Abstraction in Hardware Descriptions with CλaSH. In: Proceedings of the 14th Conference on Digital System Design (DSD), Oulu, Finland. pages 495-502, 31 Aug - 2 September, 2011. IEEE Computer Society. ISBN 978-0-7695-4494-6.

2010

• Niedermeier, A. and Wester, R. and Rovers, K.C. and Baaij, C.P.R. and Kuper, J. and Smit, G.J.M. (2010) Designing a dataflow processor using CλaSH. In: 28th Norchip Conference, 15-16 November 2010, Tampere, Finland. 69. IEEE Circuits and Systems Society. ISBN 978-1-4244-8971-8.

• Kuper, J. and Baaij, C.P.R. and Kooijman, M. and Gerards, M.E.T. (2010) Exercises in architecture specification using CλaSH. In: Proceedings of Forum on Specification and Design Languages (FDL), 2010, Southampton, England, Sept 13-16. pages 178-183. Electronic Chips & Systems design Initiative (ECSI). ISSN 1636-9874.

• Baaij, C.P.R. and Kooijman, M. and Kuper, J. and Boeijink, W.A. and Gerards, M.E.T. (2010) CλaSH: Structural Descriptions of Synchronous Hardware using Haskell. In: Proceedings of the 13th Conference on Digital System Design (DSD), Lille, France, Sept 1-3, 2010. pages 714-721. IEEE Computer Society. ISBN 978-0-7695-4171-6.

• Smit, G.J.M. and Kuper, J. and Baaij, C.P.R (2010) A mathematical approach towards hardware design. In: Dagstuhl Seminar on Dynamically Reconfigurable Architectures, 11-16 July 2010, Dagstuhl, Germany.

2009

• Baaij, C.P.R. (2009) CλasH : from Haskell to hardware. MSc thesis, University of Twente, Enschede, The Netherlands, December 2009.

• Kooijman, M. (2009) Haskell as a higher order structural hardware description language. MSc thesis, University of Twente, Enschede, The Netherlands, December 2009.